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Chapter 10: Using Implicit Rules 121
$% The target member name, when the target is an archive member. See
Chapter 11 [Archives], page 129. For example, if the target is foo.a(bar.o)
then ‘$%’ is bar.o and ‘$@’ is foo.a. ‘$%’ is empty when the target is not an
archive member.
$< The name of the first prerequisite. If the target got its recipe from an implicit
rule, this will be the first prerequisite added by the implicit rule (see Chapter 10
[Implicit Rules], page 111).
$? The names of all the prerequisites that are newer than the target, with spaces
between them. For prerequisites which are archive members, only the named
member is used (see Chapter 11 [Archives], page 129).
$^ The names of all the prerequisites, with spaces between them. For prerequisites
which are archive members, only the named member is used (see Chapter 11
[Archives], page 129). A target has only one prerequisite on each other file it
depends on, no matter how many times each file is listed as a prerequisite. So
if you list a prerequisite more than once for a target, the value of $^ contains
just one copy of the name. This list does not contain any of the order-only
prerequisites; for those see the ‘$|’ variable, below.
$+ This is like ‘$^’, but prerequisites listed more than once are duplicated in the
order they were listed in the makefile. This is primarily useful for use in linking
commands where it is meaningful to repeat library file names in a particular
order.
$| The names of all the order-only prerequisites, with spaces between them.
$* The stem with which an implicit rule matches (see Section 10.5.4 [How Patterns
Match], page 122). If the target is dir/a.foo.b and the target pattern is a.%.b
then the stem is dir/foo. The stem is useful for constructing names of related
files.
In a static pattern rule, the stem is part of the file name that matched the ‘%’
in the target pattern.
In an explicit rule, there is no stem; so ‘$*’ cannot be determined in that way.
Instead, if the target name ends with a recognized suffix (see Section 10.7 [Old-
Fashioned Suffix Rules], page 125), ‘$*’ is set to the target name minus the
suffix. For example, if the target name is ‘foo.c’, then ‘$*’ is set to ‘foo’, since
‘.c’ is a suffix. GNU make does this bizarre thing only for compatibility with
other implementations of make. You should generally avoid using ‘$*’ except in
implicit rules or static pattern rules.
If the target name in an explicit rule does not end with a recognized suffix, ‘$*’
is set to the empty string for that rule.
‘$?’ is useful even in explicit rules when you wish to operate on only the prerequisites
that have changed. For example, suppose that an archive named lib is supposed to contain
copies of several object files. This rule copies just the changed object files into the archive:
lib: foo.o bar.o lose.o win.o
ar r lib $?
- GNU Make 1
- Short Contents 5
- Table of Contents 7
- 1 Overview of make 11
- 2 An Introduction to Makefiles 13
- 2.2 A Simple Makefile 14
- 2.6 Another Style of Makefile 18
- 3 Writing Makefiles 21
- 3.1.1 Splitting Long Lines 22
- 3.3 Including Other Makefiles 23
- 3.4 The Variable MAKEFILES 24
- 3.5 How Makefiles Are Remade 24
- 3.7 How make Reads a Makefile 26
- Conditional Directives 27
- Rule Definition 27
- 3.8 Secondary Expansion 28
- 4 Writing Rules 31
- 4.2 Types of Prerequisites 32
- 4.3.1 Wildcard Examples 33
- 4.3.3 The Function wildcard 34
- 4.4.2 The vpath Directive 36
- 4.5 Phony Targets 39
- 4.11 Static Pattern Rules 46
- 4.12 Double-Colon Rules 48
- %.d: %.c 49
- @set -e; rm -f $@; \ 49
- 5 Writing Recipes in Rules 51
- 5.2 Recipe Echoing 53
- 5.3 Recipe Execution 54
- 5.3.2 Choosing the Shell 55
- 5.4 Parallel Execution 57
- 5.5 Errors in Recipes 59
- 5.7 Recursive Use of make 60
- 5.8 Defining Canned Recipes 66
- 5.9 Using Empty Recipes 67
- 6 How to Use Variables 69
- 6.3.1 Substitution References 72
- 6.3.2 Computed Variable Names 73
- 6.5 Setting Variables 75
- 6.7 The override Directive 78
- 6.9 Undefining Variables 79
- 6.13 Suppressing Inheritance 82
- 6.14 Other Special Variables 83
- 7.1 Example of a Conditional 87
- 7.2 Syntax of Conditionals 88
- 8.1 Function Call Syntax 93
- 8.3 Functions for File Names 97
- 8.5 The foreach Function 100
- 8.6 The file Function 101
- 8.7 The call Function 102
- 8.8 The value Function 103
- 8.9 The eval Function 103
- 8.10 The origin Function 104
- 8.11 The flavor Function 105
- 8.14 The guile Function 107
- 8.13 The shell Function 107
- 9 How to Run make 109
- 9.5 Overriding Variables 113
- 9.7 Summary of Options 114
- 10 Using Implicit Rules 121
- 10.4 Chains of Implicit Rules 127
- 10.5.2 Pattern Rule Examples 129
- 10.5.3 Automatic Variables 130
- 10.5.4 How Patterns Match 132
- 10.7 Old-Fashioned Suffix Rules 135
- 12 Extending GNU make 143
- 12.2 Loading Dynamic Objects 145
- 12.2.1 The load Directive 146
- Loaded Object Licensing 147
- Data Structures 148
- Registering Functions 148
- Registered Function Interface 148
- GNU make Facilities 148
- Memory Management 149
- 12.2.4 Example Loaded Object 149
- 13 Features of GNU make 153
- 15 Makefile Conventions 159
- 15.2 Utilities in Makefiles 160
- CFLAGS = -g 161
- ALL_CFLAGS = -I. $(CFLAGS) 161
- Appendix A Quick Reference 175
- Index of Concepts 201
- 192 GNU make 202
- Index of Concepts 193 203
- 194 GNU make 204
- Index of Concepts 195 205
- 196 GNU make 206
- Index of Concepts 197 207
- 198 GNU make 208
- 200 GNU make 210
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